...单片机内共有多少个SFR?分别是哪些对每个位进行说明作用...
发布网友
发布时间：2024-10-07 23:16
共1个回答
热心网友
时间：2024-10-07 23:22
2. ACC Accumulator: This register is used to assist the accumulator in certain operations.
3. PSW Program Status Word: The highest bit, PSW.7, is the carry/borrow flag C; PSW.6 is the auxiliary carry flag AC; PSW.4 and PSW.3 are the register group selection bits RS1 and RS0; PSW.2 is the overflow flag OV; and PSW.0 is the even parity bit P of ACC.
4. IP Interrupt Priority Control Register: In the 51 series, IP.0 to IP.4 control the priority of INT0, T0, INT1, T1, and UART interrupts in sequence.
5. IE Interrupt Enable Register: IE.7 is the master switch for all interrupts, EA; IE.0 to IE.4 control the enabling or disabling of INT0, T0, INT1, T1, and UART interrupt functions.
6. P0, P1, P2, P3 are four registers used to read and write the four I/O ports of the 51 microcontroller.
7. SBUF Serial Data Buffer: Writing data to SBUF automatically sends the data from the UART port.
8. SCON Serial Port Function Controller: The highest two bits, SM0 and SM1, control the working mode of the serial port; bit 5, SM2, is usually used to distinguish address frames from data frames in multi-machine communication; bits 4 and 3, REN and TB8 respectively, are the enable bits for serial port reception and the 9th data bit to be sent or received in the related working mode; the next lower bit TI and the lowest bit RI indicate that a transmission or reception process has ended, triggering the serial port interrupt with these flag bits.
9. TH0, TL0 Timer T0 Count Register High and Low Bytes: Used for counting and timing functions.
10. TH1, TL1 Timer T1 Count Register High and Low Bytes: Used for counting and timing functions.
11. TMOD Timer/Counter Mode Register: The lower 4 bits and the higher 4 bits correspond to the same content and control the working modes of T0 and T1; the next lower bit and the lowest bit control the working mode of the corresponding timer/counter; the highest bit controls whether the counting of the timer/counter is participated by the external interrupt input; the next higher bit controls whether the corresponding timer or counter works in timer or counter mode.
12. TCON Timer/Counter Control Register: TCON.0 and TCON.2 are the trigger mode selection bits for external interrupt INT0 and INT1, IT0 and IT1; TCON.1 and TCON.3 are the interrupt trigger flag bits IE0 and IE1 for external interrupt INT0 and INT1; TCON.4 and TCON.6 are the count enable bits TR0 and TR1 for T0 and T1; TCON.5 and TCON.7 are the interrupt trigger flag bits TF0 and TF1 for T0 and T1.
13. PCON Power Mode Controller: The highest bit, SMOD, is used to double the serial port communication baud rate; the lower 4 bits are used to select different low-power modes, such as idle mode, power-down mode, clock stop mode, etc.
14. DPH, DPL Data Pointer High and Low Bytes: DPTR can be used to point to program memory, on-chip RAM, or external RAM to read data.
15. SP Stack Pointer: The stack is allocated in on-chip RAM.
